MC68HC908GR16 Datasheet, PDF (176/310 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Enhanced Serial Communications Interface (ESCI) Module
14.8.1 ESCI Control Register 1
ESCI control register 1 (SCC1):
• Enables loop mode operation
• Enables the ESCI
• Controls output polarity
• Controls character length
• Controls ESCI wakeup method
• Controls idle character detection
• Enables parity function
• Controls parity type
NOTE:
Address: $0013
Bit 7
6
5
4
3
2
1
Bit 0
Read:
LOOPS ENSCI TXINV
M
WAKE
ILTY
PEN
PTY
Write:
Reset: 0
0
0
0
0
0
0
0
Figure 14-10. ESCI Control Register 1 (SCC1)
LOOPS — Loop Mode Select Bit
This read/write bit enables loop mode operation. In loop mode the RxD pin is
disconnected from the ESCI, and the transmitter output goes into the receiver
input. Both the transmitter and the receiver must be enabled to use loop mode.
Reset clears the LOOPS bit.
1 = Loop mode enabled
0 = Normal operation enabled
ENSCI — Enable ESCI Bit
This read/write bit enables the ESCI and the ESCI baud rate generator. Clearing
ENSCI sets the SCTE and TC bits in ESCI status register 1 and disables
transmitter interrupts. Reset clears the ENSCI bit.
1 = ESCI enabled
0 = ESCI disabled
TXINV — Transmit Inversion Bit
This read/write bit reverses the polarity of transmitted data. Reset clears the
TXINV bit.
1 = Transmitter output inverted
0 = Transmitter output not inverted
Setting the TXINV bit inverts all transmitted values including idle, break, start, and
stop bits.
Data Sheet
176
MC68HC908GR16 — Rev. 1.0
Enhanced Serial Communications Interface (ESCI) Module
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