MC68HC908GR16 Datasheet, PDF (69/310 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Clock Generator Module (CGM)
I/O Signals
4.4 I/O Signals
The following paragraphs describe the CGM I/O signals.
4.4.1 Crystal Amplifier Input Pin (OSC1)
The OSC1 pin is an input to the crystal oscillator amplifier.
4.4.2 Crystal Amplifier Output Pin (OSC2)
The OSC2 pin is the output of the crystal oscillator inverting amplifier.
4.4.3 External Filter Capacitor Pin (CGMXFC)
The CGMXFC pin is required by the loop filter to filter out phase corrections. An
external filter network is connected to this pin. (See Figure 4-2.)
NOTE:
To prevent noise problems, the filter network should be placed as close to the
CGMXFC pin as possible, with minimum routing distances and no routing of other
signals across the network.
4.4.4 PLL Analog Power Pin (V_DDA)
V_DDA is a power pin used by the analog portions of the PLL. Connect the V_DDA pin
to the same voltage potential as the V_DD pin.
NOTE: Route V_DDA carefully for maximum noise immunity and place bypass capacitors as
close as possible to the package.
4.4.5 PLL Analog Ground Pin (V_SSA)
V_SSA is a ground pin used by the analog portions of the PLL. Connect the V_SSA pin
to the same voltage potential as the V_SS pin.
NOTE: Route V_SSA carefully for maximum noise immunity and place bypass capacitors as
close as possible to the package.
4.4.6 Oscillator Enable Signal (SIMOSCEN)
The SIMOSCEN signal comes from the system integration module (SIM) and
enables the oscillator and PLL.
4.4.7 Oscillator Stop Mode Enable Bit (OSCSTOPENB)
OSCSTOPENB is a bit in the CONFIG register that enables the oscillator to
continue operating during stop mode. If this bit is set, the Oscillator continues
running during stop mode. If this bit is not set (default), the oscillator is controlled
by the SIMOSCEN signal which will disable the oscillator during stop mode.
MC68HC908GR16 — Rev. 1.0
MOTOROLA
Clock Generator Module (CGM)
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Data Sheet
69