MC68HC908GR16 Datasheet, PDF (165/310 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Enhanced Serial Communications Interface (ESCI) Module
Functional Description
INTERNAL BUS
÷4
SCP1
SCP0
SCR1
SCR2
SCR0
PRE-
BAUD
SCALER DIVIDER
÷ 16
TXINV
ESCI DATA REGISTER
11-BIT
TRANSMIT
SHIFT REGISTER
H876543210L
SCI_TxD
PDS2
PDS1
PDS0
PSSB4
PSSB3
PSSB2
PSSB1
PSSB0
M
PEN
PARITY
PTY
GENERATION
T8
TRANSMITTER
CONTROL LOGIC
SCTE
SCTE
SCTIE
TC
TCIE
SCTIE
TC
TCIE
Figure 14-5. ESCI Transmitter
SBK
LOOPS
ENSCI
TE
LINT
At the start of a transmission, transmitter control logic automatically loads the
transmit shift register with a preamble of logic 1s. After the preamble shifts out,
control logic transfers the SCDR data into the transmit shift register. A logic 0 start
bit automatically goes into the least significant bit (LSB) position of the transmit shift
register. A logic 1 stop bit goes into the most significant bit (MSB) position.
The ESCI transmitter empty bit, SCTE, in SCS1 becomes set when the SCDR
transfers a byte to the transmit shift register. The SCTE bit indicates that the SCDR
can accept new data from the internal data bus. If the ESCI transmit interrupt
enable bit, SCTIE, in SCC2 is also set, the SCTE bit generates a transmitter CPU
interrupt request.
When the transmit shift register is not transmitting a character, the TxD pin goes to
the idle condition, logic 1. If at any time software clears the ENSCI bit in ESCI
control register 1 (SCC1), the transmitter and receiver relinquish control of the
port E pins.
MC68HC908GR16 — Rev. 1.0
MOTOROLA
Enhanced Serial Communications Interface (ESCI) Module
For More Information On This Product,
Go to: www.freescale.com
Data Sheet
165