MC68HC908GR16 Datasheet, PDF (79/310 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Clock Generator Module (CGM)
Acquisition/Lock Time Specifications
4.8.2 Parametric Influences on Reaction Time
Acquisition and lock times are designed to be as short as possible while still
providing the highest possible stability. These reaction times are not constant,
however. Many factors directly and indirectly affect the acquisition time.
The most critical parameter which affects the reaction times of the PLL is the
reference frequency, f_RDV. This frequency is the input to the phase detector and
controls how often the PLL makes corrections. For stability, the corrections must
be small compared to the desired frequency, so several corrections are required to
reduce the frequency error. Therefore, the slower the reference the longer it takes
to make these corrections. This parameter is under user control via the choice of
crystal frequency f_XCLK and the R value programmed in the reference divider. (See
4.3.3 PLL Circuits, 4.3.6 Programming the PLL, and 4.5.6 PLL Reference
Divider Select Register.)
Another critical parameter is the external filter network. The PLL modifies the
voltage on the VCO by adding or subtracting charge from capacitors in this
network. Therefore, the rate at which the voltage changes for a given frequency
error (thus change in charge) is proportional to the capacitance. The size of the
capacitor also is related to the stability of the PLL. If the capacitor is too small, the
PLL cannot make small enough adjustments to the voltage and the system cannot
lock. If the capacitor is too large, the PLL may not be able to adjust the voltage in
a reasonable time. (See 4.8.3 Choosing a Filter.)
Also important is the operating voltage potential applied to V_DDA. The power supply
potential alters the characteristics of the PLL. A fixed value is best. Variable
supplies, such as batteries, are acceptable if they vary within a known range at very
slow speeds. Noise on the power supply is not acceptable, because it causes small
frequency errors which continually change the acquisition time of the PLL.
Temperature and processing also can affect acquisition time because the electrical
characteristics of the PLL change. The part operates as specified as long as these
influences stay within the specified limits. External factors, however, can cause
drastic changes in the operation of the PLL. These factors include noise injected
into the PLL through the filter capacitor, filter capacitor leakage, stray impedances
on the circuit board, and even humidity or circuit board contamination.
MC68HC908GR16 — Rev. 1.0
MOTOROLA
Clock Generator Module (CGM)
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Data Sheet
79