MC68HC908GR16 Datasheet, PDF (207/310 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
System Integration Module (SIM)
Exception Control
15.5.1.2 SWI Instruction
The SWI instruction is a non-maskable instruction that causes an interrupt
regardless of the state of the interrupt mask (I bit) in the condition code register.
NOTE: A software interrupt pushes PC onto the stack. A software interrupt does not push
PC – 1, as a hardware interrupt does.
15.5.1.3 Interrupt Status Registers
The flags in the interrupt status registers identify maskable interrupt sources. Table
15-3 summarizes the interrupt sources and the interrupt status register flags that
they set. The interrupt status registers can be useful for debugging.
Table 15-3. Interrupt Sources
Priority
Highest
Lowest
Interrupt Source
Reset
SWI instruction
IRQ pin
ICG clock monitor
TIM1 channel 0
TIM1 channel 1
TIM1 overflow
TIM2 channel 0
TIM2 channel 1
TIM2 overflow
SPI receiver full
SPI transmitter empty
SCI receive error
SCI receive
SCI transmit
Keyboard
ADC conversion complete
Timebase module
Interrupt Status Register Flag
—
—
I1
I2
I3
I4
I5
I6
I7
I8
I9
I10
I11
I12
I13
I14
I15
I16
MC68HC908GR16 — Rev. 1.0
MOTOROLA
System Integration Module (SIM)
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Data Sheet
207