MC68HC908GR16 Datasheet, PDF (44/310 Pages) Motorola, Inc – Microcontrollers

Memory
Freescale Semiconductor, Inc.
2.6.1.5 FLASH Block Protection
Due to the ability of the on-board charge pump to erase and program the FLASH
memory in the target application, provision is made for protecting a block of
memory from unintentional erase or program operations due to system
malfunction. This protection is done by using of a FLASH block protect register
(FLBPR). The FLBPR determines the range of the FLASH memory which is to be
protected. The range of the protected area starts from a location defined by FLBPR
and ends at the bottom of the FLASH memory ($FFFF). When the memory is
protected, the HVEN bit cannot be set in either ERASE or PROGRAM operations.
NOTE: In performing a program or erase operation, the FLASH block protect register must
be read after setting the PGM or ERASE bit and before asserting the HVEN bit
When the FLBPR is program with all 0’s, the entire memory is protected from being
programmed and erased. When all the bits are erased (all 1’s), the entire memory
is accessible for program and erase.
When bits within the FLBPR are programmed, they lock a block of memory,
address ranges as shown in 2.6.1.5 FLASH Block Protection. Once the FLBPR
is programmed with a value other than $FF, any erase or program of the FLBPR or
the protected block of FLASH memory is prohibited. The presence of a V_TST on the
IRQ pin will bypass the block protection so that all of the memory included in the
block protect register is open for program and erase operations.
NOTE:
The FLASH block protect register is not protected with special hardware or
software. Therefore, if this page is not protected by FLBPR the register is erased
by either a page or mass erase operation.
2.6.1.6 FLASH Block Protect Register
The FLASH block protect register (FLBPR) is implemented as a byte within the
FLASH memory, and therefore can only be written during a programming
sequence of the FLASH memory. The value in this register determines the starting
location of the protected range within the FLASH memory.
Address: $FF7E
Bit 7
6
5
4
3
2
1
Read:
BPR7
Write:
BPR6
BPR5
BPR4
BPR3
BPR2
BPR1
Reset: U
U
U
U
U
U
U
U = Unaffected by reset. Initial value from factory is 1.
Write to this register is by a programming sequence to the FLASH memory.
Figure 2-5. FLASH Block Protect Register (FLBPR)
Bit 0
BPR0
U
Data Sheet
44
Memory
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MC68HC908GR16 — Rev. 1.0
MOTOROLA