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MC68HC908GR16 Datasheet, PDF (128/310 Pages) Motorola, Inc – Microcontrollers
Freescale Semiconductor, Inc.
Low-Voltage Inhibit (LVI)
LVIOUT — LVI Output Bit
This read-only flag becomes set when the VDD voltage falls below the VTRIPF
trip voltage (see Table 11-1). Reset clears the LVIOUT bit.
Table 11-1. LVIOUT Bit Indication
VDD
VDD > VTRIPR
VDD < VTRIPF
VTRIPF < VDD < VTRIPR
LVIOUT
0
1
Previous value
11.5 LVI Interrupts
The LVI module does not generate interrupt requests.
11.6 Low-Power Modes
The STOP and WAIT instructions put the MCU in low power-consumption standby
modes.
11.6.1 Wait Mode
If enabled, the LVI module remains active in wait mode. If enabled to generate
resets, the LVI module can generate a reset and bring the MCU out of wait mode.
11.6.2 Stop Mode
If enabled in stop mode (LVISTOP set), the LVI module remains active in stop
mode. If enabled to generate resets, the LVI module can generate a reset and bring
the MCU out of stop mode.
Data Sheet
128
Low-Voltage Inhibit (LVI)
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MC68HC908GR16 — Rev. 1.0
MOTOROLA