MC68HC908GR16 Datasheet, PDF (40/310 Pages) Motorola, Inc – Microcontrollers

Memory
Freescale Semiconductor, Inc.
PGM — Program Control Bit
This read/write bit configures the memory for program operation. PGM is
interlocked with the ERASE bit such that both bits cannot be equal to 1 or set
to 1 at the same time.
1 = Program operation selected
0 = Program operation unselected
2.6.1.2 FLASH Page Erase Operation
Use this step-by-step procedure to erase a page (64 bytes) of FLASH memory to
read as logic 1. A page consists of 64 consecutive bytes starting from addresses
$XX00, $XX40, $XX80, or $XXC0. The 44-byte user interrupt vectors area also
forms a page. Any FLASH memory page can be erased alone.
1. Set the ERASE bit, and clear the MASS bit in the FLASH control register.
2. Read the FLASH block protect register.
3. Write any data to any FLASH address within the page address range
desired.
4. Wait for a time, t_NVS (minimum 10 µs)
5. Set the HVEN bit.
6. Wait for a time, t_Erase (minimum 1 ms or 4 ms)
7. Clear the ERASE bit.
8. Wait for a time, t_NVH (minimum 5 µs)
9. Clear the HVEN bit.
10. After a time, t_RCV (typical 1 µs), the memory can be accessed again in read
mode.
NOTE:
Programming and erasing of FLASH locations cannot be performed by code being
executed from FLASH memory. While these operations must be performed in the
order shown, other unrelated operations may occur between the steps.
It is highly recommended that interrupts be disabled during program/ erase
operations.
In applications that need more than 1000 program/erase cycles, use the 4-ms page
erase specification to get improved long-term reliability. Any application can use
this 4-ms page erase specification. However, in applications where a FLASH
location will be erased and reprogrammed less than 1000 times, and speed is
important, use the 1-ms page erase specification to get a lower minimum erase
time.
Data Sheet
40
Memory
For More Information On This Product,
Go to: www.freescale.com
MC68HC908GR16 — Rev. 1.0
MOTOROLA