MC68HC908GR16 Datasheet, PDF (60/310 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Clock Generator Module (CGM)
Figure 4-1 shows the structure of the CGM.
OSC2
OSCILLATOR (OSC)
OSC1
SIMOSCEN (FROM SIM)
OSCSTOPENB
(FROM CONFIG)
CGMXCLK
(TO: SIM, TIMTB15A, ADC)
PHASE-LOCKED LOOP (PLL)
CGMRDV
REFERENCE
DIVIDER
CGMRCLK
CLOCK
BCS
SELECT
÷2
CIRCUIT
RDS3–RDS0
V_DDA
CGMXFC
V_SSA
VPR1–VPR0
VRS7–VRS0
CGMOUT
(TO SIM)
PHASE
DETECTOR
LOCK
DETECTOR
LOOP
FILTER
VOLTAGE
CONTROLLED
OSCILLATOR
PLL ANALOG
AUTOMATIC
MODE
CONTROL
INTERRUPT
CONTROL
CGMVCLK
LOCK
MUL11–MUL0
AUTO ACQ
PLLIE PLLF
PRE1–PRE0
CGMVDV
FREQUENCY
DIVIDER
FREQUENCY
DIVIDER
CGMINT
(TO SIM)
Data Sheet
60
Figure 4-1. CGM Block Diagram
Clock Generator Module (CGM)
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Go to: www.freescale.com
MC68HC908GR16 — Rev. 1.0
MOTOROLA