MC68HC908GR16 Datasheet, PDF (39/310 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Memory
FLASH Memory (FLASH)
NOTE:
The address ranges for the user memory and vectors are:
• $C000–$FDFF; user memory
• $FE08; FLASH control register
• $FF7E; FLASH block protect register
• $FFD4–$FFFF; these locations are reserved for user-defined interrupt and
reset vectors
Programming tools are available from Motorola. Contact your local Motorola
representative for more information.
A security feature prevents viewing of the FLASH contents.⁽¹⁾
2.6.1.1 FLASH Control Register
The FLASH control register (FLCR) controls FLASH program and erase
operations.
Address: $FE08
Bit 7
6
5
4
3
2
1
Bit 0
Read: 0
0
0
0
HVEN MASS ERASE PGM
Write:
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 2-3. FLASH Control Register (FLCR)
HVEN — High-Voltage Enable Bit
This read/write bit enables the charge pump to drive high voltages for program
and erase operations in the array. HVEN can only be set if either PGM = 1 or
ERASE = 1 and the proper sequence for program or erase is followed.
1 = High voltage enabled to array and charge pump on
0 = High voltage disabled to array and charge pump off
MASS — Mass Erase Control Bit
Setting this read/write bit configures the 16-Kbyte FLASH array for mass erase
operation.
1 = MASS erase operation selected
0 = PAGE erase operation selected
ERASE — Erase Control Bit
This read/write bit configures the memory for erase operation. ERASE is
interlocked with the PGM bit such that both bits cannot be equal to 1 or set to 1
at the same time.
1 = Erase operation selected
0 = Erase operation unselected
1. No security feature is absolutely secure. However, Motorola’s strategy is to make reading or copy-
ing the FLASH difficult for unauthorized users.
MC68HC908GR16 — Rev. 1.0
MOTOROLA
Memory
For More Information On This Product,
Go to: www.freescale.com
Data Sheet
39