MC68HC908GR16 Datasheet, PDF (164/310 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Enhanced Serial Communications Interface (ESCI) Module
14.4.1 Data Format
The SCI uses the standard non-return-to-zero mark/space data format illustrated
in Figure 14-4.
PARITY
START
8-BIT DATA FORMAT
(BIT M IN SCC1 CLEAR)
OR DATA
BIT
NEXT
START
BIT _{BIT 0 BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7 STOP BIT}
BIT
PARITY
START
9-BIT DATA FORMAT
(BIT M IN SCC1 SET)
OR DATA
BIT
NEXT
START
BIT BIT 0 BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7 BIT 8 _STOP BIT
BIT
Figure 14-4. SCI Data Formats
14.4.2 Transmitter
Figure 14-5 shows the structure of the SCI transmitter and the registers are
summarized in Figure 14-3. The baud rate clock source for the ESCI can be
selected via the configuration bit, SCIBDSRC.
14.4.2.1 Character Length
The transmitter can accommodate either 8-bit or 9-bit data. The state of the M bit
in ESCI control register 1 (SCC1) determines character length. When transmitting
9-bit data, bit T8 in ESCI control register 3 (SCC3) is the ninth bit (bit 8).
14.4.2.2 Character Transmission
During an ESCI transmission, the transmit shift register shifts a character out to the
TxD pin. The ESCI data register (SCDR) is the write-only buffer between the
internal data bus and the transmit shift register.
To initiate an ESCI transmission:
1. Enable the ESCI by writing a logic 1 to the enable ESCI bit (ENSCI) in ESCI
control register 1 (SCC1).
2. Enable the transmitter by writing a logic 1 to the transmitter enable bit (TE)
in ESCI control register 2 (SCC2).
3. Clear the ESCI transmitter empty bit (SCTE) by first reading ESCI status
register 1 (SCS1) and then writing to the SCDR. For 9-bit data, also write the
T8 bit in SCC3.
4. Repeat step 3 for each subsequent transmission.
Data Sheet
164
MC68HC908GR16 — Rev. 1.0
Enhanced Serial Communications Interface (ESCI) Module
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