MC68HC908GR16 Datasheet, PDF (150/310 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Resets and Interrupts
After every instruction, the CPU checks all pending interrupts if the I bit is not set.
If more than one interrupt is pending when an instruction is done, the highest
priority interrupt is serviced first. In the example shown in Figure 13-4, if an
interrupt is pending upon exit from the interrupt service routine, the pending
interrupt is serviced before the LDA instruction is executed.
CLI
LDA #$FF
BACKGROUND
ROUTINE
INT1
PSHH
PULH
RTI
INT1 INTERRUPT SERVICE ROUTINE
INT2
PSHH
INT2 INTERRUPT SERVICE ROUTINE
PULH
RTI
Figure 13-4. Interrupt Recognition Example
NOTE:
The LDA opcode is prefetched by both the INT1 and INT2 RTI instructions.
However, in the case of the INT1 RTI prefetch, this is a redundant operation.
To maintain compatibility with the M6805 Family, the H register is not pushed on
the stack during interrupt entry. If the interrupt service routine modifies the H
register or uses the indexed addressing mode, save the H register and then restore
it prior to exiting the routine.
See Figure 13-5 for a flowchart depicting interrupt processing.
13.3.2 Sources
The sources in Table 13-1 can generate CPU interrupt requests.
Data Sheet
150
Resets and Interrupts
For More Information On This Product,
Go to: www.freescale.com
MC68HC908GR16 — Rev. 1.0
MOTOROLA