MC68HC908GR16 Datasheet, PDF (64/310 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Clock Generator Module (CGM)
• Software must wait a given time, t_AL, after entering tracking mode before
selecting the PLL as the clock source to CGMOUT (BCS = 1).
• The LOCK bit is disabled.
• CPU interrupts from the CGM are disabled.
4.3.6 Programming the PLL
NOTE:
The following procedure shows how to program the PLL.
The round function in the following equations means that the real number should
be rounded to the nearest integer number.
1. Choose the desired bus frequency, f_BUSDES.
2. Calculate the desired VCO frequency (four times the desired bus
frequency).
f_VCLKDES = 4 × f_BUSDES
3. Choose a practical PLL (crystal) reference frequency, f_RCLK, and the
reference clock divider, R. Typically, the reference crystal is 32.768 kHz and
R = 1.
Frequency errors to the PLL are corrected at a rate of f_RCLK/R. For stability
and lock time reduction, this rate must be as fast as possible. The VCO
frequency must be an integer multiple of this rate. The relationship between
the VCO frequency, f_VCLK, and the reference frequency, f_RCLK, is
f_VCLK
=
2----^P_----N---
R
(
f_R
C
LK⁾
P, the power of two multiplier, and N, the range multiplier, are integers.
In cases where desired bus frequency has some tolerance, choose f_RCLK to
a value determined either by other module requirements (such as modules
which are clocked by CGMXCLK), cost requirements, or ideally, as high as
the specified range allows. See Section 20. Electrical Specifications.
Choose the reference divider, R = 1. After choosing N and P, the actual bus
frequency can be determined using equation in 2 above.
When the tolerance on the bus frequency is tight, choose f_RCLK to an integer
divisor of f_BUSDES, and R = 1. If f_RCLK cannot meet this requirement, use the
following equation to solve for R with
practical choices of f_RCLK, and choose the f_RCLK that gives the lowest R.
R
=
round
R_M
A
X
×






f--_{V----fC--R--L--C-K--L-D--K--E----S- }
–
int
eg
er



-f-^V----f^C--_R--^L--_C-^K--_L-^D--_K--^E----^S- _{}



Data Sheet
64
Clock Generator Module (CGM)
For More Information On This Product,
Go to: www.freescale.com
MC68HC908GR16 — Rev. 1.0
MOTOROLA