MC68HC908GR16 Datasheet, PDF (140/310 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Input/Output Ports (PORTS)
NOTE:
DDRD7–DDRD0 — Data Direction Register D Bits
These read/write bits control port D data direction. Reset clears
DDRD7–DDRD0, configuring all port D pins as inputs.
1 = Corresponding port D pin configured as output
0 = Corresponding port D pin configured as input
Avoid glitches on port D pins by writing to the port D data register before changing
data direction register D bits from 0 to 1.
Figure 12-15 shows the port D I/O logic.
READ DDRD ($0007)
WRITE DDRD ($0007)
RESET
WRITE PTD ($0003)
VDD
DDRDx
PTDx
PTDPUEx
READ PTD ($0003)
INTERNAL
PULLUP
DEVICE
PTDx
Figure 12-15. Port D I/O Circuit
When bit DDRDx is a logic 1, reading address $0003 reads the PTDx data latch.
When bit DDRDx is a logic 0, reading address $0003 reads the voltage level on the
pin. The data latch can always be written, regardless of the state of its data
direction bit. Table 12-5 summarizes the operation of the port D pins.
Table 12-5. Port D Pin Functions
PTDPUE
Bit
DDRD
Bit
PTD
Bit
I/O Pin
Mode
1
0
X⁽¹⁾
Input, V_DD(2)
0
0
X
Input, Hi-Z⁽⁴⁾
X
1
X
Output
1. X = Don’t care
2. I/O pin pulled up to V_DD by internal pullup device.
3. Writing affects data register, but does not affect input.
4. Hi-Z = High imp[edance
Accesses
to DDRD
Read/Write
DDRD7–DDRD0
DDRD7–DDRD0
DDRD7–DDRD0
Accesses
to PTD
Read
Write
Pin
PTD7–PTD0⁽³⁾
Pin
PTD7–PTD0⁽³⁾
PTD7–PTD0
PTD7–PTD0
Data Sheet
140
Input/Output Ports (PORTS)
For More Information On This Product,
Go to: www.freescale.com
MC68HC908GR16 — Rev. 1.0
MOTOROLA