MC68HC908GR16 Datasheet, PDF (129/310 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Data Sheet — MC68HC908GR16
Section 12. Input/Output Ports (PORTS)
12.1 Introduction
Bidirectional input-output (I/O) pins form five parallel ports. All I/O pins are
programmable as inputs or outputs. All individual bits within port A, port C, and
port D are software configurable with pullup devices if configured as input port bits.
The pullup devices are automatically and dynamically disabled when a port bit is
switched to output mode.
NOTE:
Connect any unused I/O pins to an appropriate logic level, either V_DD or V_SS.
Although the I/O ports do not require termination for proper operation, termination
reduces excess current consumption and the possibility of electrostatic damage.
Not all port pins are bonded out in all packages. Care sure be taken to make any
unbonded port pins an output to reduce them from being floating inputs.
Addr.
$0000
$0001
$0002
$0003
$0004
Register Name
Bit 7
6
5
4
3
Port A Data Register ^Read:
(PTA) Write:
See page 132. _Reset:
PTA7
PTA6
PTA5
PTA4
PTA3
Unaffected by reset
Port B Data Register ^Read:
(PTB) Write:
See page 134.
Reset:
PTB7
PTB6
PTB5
PTB4
PTB3
Unaffected by reset
Read: 0
Port C Data Register
(PTC) Write:
See page 136. _Reset:
PTC6
PTC5
PTC4
PTC3
Unaffected by reset
Port D Data Register ^Read:
(PTD) Write:
See page 138. _Reset:
PTD7
PTD6
PTD5
PTD4
PTD3
Unaffected by reset
Data Direction Register A ^Read:
(DDRA) Write:
See page 132.
Reset:
DDRA7
0
DDRA6
0
DDRA5
0
DDRA4
0
DDRA3
0
= Unimplemented
Figure 12-1. I/O Port Register Summary
2
PTA2
PTB2
PTC2
PTD2
DDRA2
0
1
PTA1
PTB1
PTC1
PTD1
DDRA1
0
Bit 0
PTA0
PTB0
PTC0
PTD0
DDRA0
0
MC68HC908GR16 — Rev. 1.0
MOTOROLA
Input/Output Ports (PORTS)
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Data Sheet
129