MC68HC908GR16 Datasheet, PDF (197/310 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
System Integration Module (SIM)
Introduction
STOP/WAIT
CONTROL
SIM
COUNTER
MODULE STOP
MODULE WAIT
CPU STOP (FROM CPU)
CPU WAIT (FROM CPU)
SIMOSCEN (TO CGM)
CGMXCLK (FROM CGM)
CGMOUT (FROM CGM)
÷2
RESET
PIN LOGIC
V_DD
INTERNAL
PULLUP
DEVICE
CLOCK
CONTROL
CLOCK GENERATORS
POR CONTROL
RESET PIN CONTROL
SIM RESET STATUS REGISTER
MASTER
RESET
CONTROL
RESET
INTERNAL CLOCKS
FORCED MONITOR MODE ENTRY
LVI (FROM LVI MODULE)
ILLEGAL OPCODE (FROM CPU)
ILLEGAL ADDRESS (FROM ADDRESS
MAP DECODERS)
COP (FROM COP MODULE)
Signal Name
CGMXCLK
CGMVCLK
CGMOUT
IAB
IDB
PORRST
IRST
R/W
INTERRUPT CONTROL
AND PRIORITY DECODE
INTERRUPT SOURCES
CPU INTERFACE
Figure 15-2. SIM Block Diagram
Table 15-1. Signal Name Conventions
Description
Buffered version of OSC1 from clock generator module (CGM)
PLL output
PLL-based or OSC1-based clock output from CGM module
(Bus clock = CGMOUT divided by two)
Internal address bus
Internal data bus
Signal from the power-on reset module to the SIM
Internal reset signal
Read/write signal
MC68HC908GR16 — Rev. 1.0
MOTOROLA
System Integration Module (SIM)
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Data Sheet
197