MC68HC908GR16 Datasheet, PDF (206/310 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
System Integration Module (SIM)
15.5.1.1 Hardware Interrupts
A hardware interrupt does not stop the current instruction. Processing of a
hardware interrupt begins after completion of the current instruction. When the
current instruction is complete, the SIM checks all pending hardware interrupts.
If interrupts are not masked (I bit clear in the condition code register) and if the
corresponding interrupt enable bit is set, the SIM proceeds with interrupt
processing; otherwise, the next instruction is fetched and executed.
If more than one interrupt is pending at the end of an instruction execution, the
highest priority interrupt is serviced first. Figure 15-12 demonstrates what happens
when two interrupts are pending. If an interrupt is pending upon exit from the
original interrupt service routine, the pending interrupt is serviced before the LDA
instruction is executed.
CLI
LDA #$FF
BACKGROUND
ROUTINE
INT1
PSHH
PULH
RTI
INT1 INTERRUPT SERVICE ROUTINE
INT2
PSHH
INT2 INTERRUPT SERVICE ROUTINE
PULH
RTI
Figure 15-12. Interrupt Recognition Example
NOTE:
The LDA opcode is prefetched by both the INT1 and INT2 RTI instructions.
However, in the case of the INT1 RTI prefetch, this is a redundant operation.
To maintain compatibility with the M6805 Family, the H register is not pushed on
the stack during interrupt entry. If the interrupt service routine modifies the H
register or uses the indexed addressing mode, software should save the H register
and then restore it prior to exiting the routine.
Data Sheet
206
System Integration Module (SIM)
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MC68HC908GR16 — Rev. 1.0
MOTOROLA