MC68HC908GR16 Datasheet, PDF (212/310 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
System Integration Module (SIM)
15.7 SIM Registers
The SIM has three memory-mapped registers. Table 15-4 shows the mapping of
these registers.
Table 15-4. SIM Registers
Address
$FE00
$FE01
$FE03
Register
BSR
SRSR
BFCR
Access Mode
User
User
User
15.7.1 Break Status Register
The break status register (BSR) contains a flag to indicate that a break caused an
exit from wait mode. This register is only used in emulation mode.
Address: $FE00
Bit 7
6
5
4
3
2
1
Bit 0
Read:
SBSW
R
Write:
R
R
R
R
R
Note⁽¹⁾
R
Reset: 0
0
0
0
0
0
0
0
R
= Reserved
1. Writing a logic 0 clears SBSW.
Figure 15-21. Break Status Register (BSR)
SBSW — SIM Break Stop/Wait
This status bit is useful in applications requiring a return to wait mode after
exiting from a break interrupt. Clear SBSW by writing a logic 0 to it. Reset clears
SBSW.
1 = Wait mode was exited by break interrupt.
0 = Wait mode was not exited by break interrupt.
SBSW can be read within the break state SWI routine. The user can modify the
return address on the stack by subtracting one from it.
Data Sheet
212
System Integration Module (SIM)
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MC68HC908GR16 — Rev. 1.0
MOTOROLA