82374EB Datasheet, PDF (76/208 Pages) Intel Corporation – SYSTEM COMPONENT (ESC)

82374EB 82374SB
3 3 2 TIMER READ BACK COMMAND REGISTER
Register Location
Default Value
Attribute
Size
043h Timer 1
04Bh Timer 2
xxh
Write Only
8 Bits
The Read-Back command is used to determine the count value programmed mode and current states of the
OUT pin and Null Count flag of the selected counter or counters The Read-Back command is written to the
Control Word register which latches the current states of the above mentioned variables The value of the
counter and its status may then be read by I O access to the counter address
Status and or count may be latched on one two or all three of the counters by selecting the counter during
the write The Count latched will stay latched until read regardless of further latch commands The count must
be read before newer latch commands latch a new count The Status latched by the read-back command will
also remain latched until after a read to the counter’s I O port To reiterate the Status and Count are
unlatched only after a counter read of the Status register the Count register or the Status and Count register
in succession
Both count and status of the selected counter(s) may be latched simultaneously by setting both the COUNT
and STATUS bits 5 4 ^e00b This is functionally the same as issuing two consecutive separate read-back
commands As stated above if multiple count and or status read-back commands are issued to the same
counter(s) without any intervening reads all but the first are ignored
If both count and status of a counter are latched the first read operation from that counter will return the
latched status regardless of which was latched first The next one or two reads (depending on whether the
counter is programmed for one or two byte counts) return the latched count Subsequent reads return an
unlatched count
A register description of the Status Byte read follows later in this section Note that bit definitions for a write to
this port changed when the read-back command was selected when compared to a normal control word write
to this same port
Bit
Description
7 6 Read Back Command When bits 7 6 are both 1 the read-back command is selected during a write
to the control word The normal meanings (mode countdown r w select) of the bits in the control
register at I O address 043h change when the read-back command is selected Following the read-
back command I O reads from the selected counter’s I O addresses produce the current latch status
the current latched count or both if bits 4 and 5 are both 0
5 Latch Status of Selected Counters When bit 5 is a 1 the Current Count value of the selected
counters will be latched When bit 4 is a 0 the Status will not be latched
4 Latch Count of Selected Counters When bit 4 is a 1 the Status of the selected counters will be
latched When bit 4 is a 0 the Status will not be latched The Status byte format is described in the
next register description
3 Counter 2 Counter 2 is selected for the latch command selected with bits 4 and 5 if bit 3 is a 1 If bit 3
is a 0 Status and or Count will not be latched
2 Counter 1 Counter 1 is selected for the latch command selected with bits 4 and 5 if bit 2 is a 1 If bit 2
is a 0 Status and or Count will not be latched
1 Counter 0 Counter 0 is selected for the latch command selected with bits 4 and 5 if bit 1 is a 1 If bit 1
is a 0 Status and or Count will not be latched
0 Reserved Must be 0
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