82374EB Datasheet, PDF (34/208 Pages) Intel Corporation – SYSTEM COMPONENT (ESC)

82374EB 82374SB
Pin Name
XBUSOE
GPCS 2 0
ECS 2 0
Type
Description
out X-BUS DATA OUTPUT ENABLE XBUSOE is tied directly to the output enable of
a 74F245 that buffers the X-Bus data XD(7 0) from the system data bus SD(7 0)
For EISA and ISA master memory read or write cycles XBUSOE is asserted
when LBIOSCS is asserted Otherwise XBUSOE is not asserted
For EISA and ISA master I O read or write cycles SBUSOE is asserted if an ISC
supported X-Bus device has been decoded and the decoding for that device has
been enabled via the proper configuration registers An exception to this is during
an I O read access to floppy location 3F7h (primary) or 377h (secondary) if the IDE
decode space is disabled (i e IDE is not present on the X-Bus) In this case
XBUSOE is not asserted XBUSOE is also not asserted during an I O access to
the floppy controller if DSKCHG is sampled low at reset
XBUSOE is not asserted during DMA cycles except for channel 2 DMA For
channel 2 DMA XBUSOE is asserted
out GENERAL PURPOSE CHIP SELECT ENCODED CHIP SELECT These are dual
function signals The function of these pins is selected through the Mode Select
Register bit 4
General Purpose Chip Select GPCS 2 0 are chip selects for peripheral
devices The peripheral devices can be mapped in the I O range by programming
the General Purpose Chip Select Base Address registers and General Purpose
Mask registers (offset 64h-6Eh)
Encoded Chip Select ECS 2 0 provide encoded chip select decoding for serial
ports parallel port IDE and general purpose devices The device chip selects for
the peripheral devices are generated by using a F138 with ECS 2 0 as inputs
Hardware Reset (Test Mode)
82374SB
During Reset GPCS0 ECS0 is an input signal The level of this signal is sampled at
the end of the reset sequence to determine whether the TEST pin is used as the
current TEST function (sampled ‘‘1’’) or as the INIT signal (sampled ‘‘0’’) After
reset the existing GPCS ECS functionality on this pin is maintained Note that an
internal pull-up of approximately 8 KX is included on this pin If the INIT mode on
the TEST pin is to be selected an external pull-down of approximately 500X should
be connected to the pin
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