82374EB Datasheet, PDF (70/208 Pages) Intel Corporation – SYSTEM COMPONENT (ESC)

82374EB 82374SB
The Start command assumes the Base and Current registers are both empty and will request a prefetch
automatically It also sets the status register to S-G Active Base Empty Current Empty not Terminated and
Next Null Indicator to 0 The EOP IRQ13 bit will still reflect the last value programmed
Bit
Description
7 EOP IRQ13 Selection Bit 7 is used to select whether EOP or IRQ will be asserted at termination
caused by the last buffer expiring The last buffer can be either the last buffer in the list or the last
buffer loaded in the DMA while it is suspended If this bit is set to 1 then EOP will be asserted
whenever the last buffer is completed If this bit is set to 0 then IRQ13 will be asserted whenever the
last buffer is completed
EOP can be used to alert an expansion bus I O device that a scatter-gather termination condition was
reached the I O device in turn can assert its own interrupt request line and invoke a dedicated
interrupt handling routine IRQ13 should be used whenever the CPU needs to be notified directly
Following reset or Master Clear the value stored for this bit is 0 and IRQ13 is selected Bit 6 must be
set to a 1 to enable this bit during an S-G Command register write When bit 6 is a 0 during the write bit
7 will not have any effect on the current EOP IRQ13 selection
6 Enable IRQ13 EOP Programming Enabling IRQ13 EOP programming allows initialization or
modification of the S-G termination handling bits If bit 5 is reset to 0 bit 7 will not have any effect on
the state of IRQ13 or EOP assertion When bit 5 is set to a 1 bit 7 determines the termination handling
following a terminal count
5 2 Reserved
1 0 S-G Command Code
Bits 1 0 Function
00
No S-G command operation is performed Bits 7 5 may still be used to program EOP
IRQ13 selection
01
The Start command initiates the scatter-gather process Immediately after the Start
command is issued a request is issued to fetch the initial buffer to fill the Base Register set
in preparation for performing a transfer The Buffer Prefetch request has the same priority
with respect to other channels as the DREQ it is associated with Within the channel
DREQ is higher in priority than a prefetch request
10
The Stop command halts a Scatter-Gather transfer immediately When a Stop command is
given the Terminate bit in the S-G Status register and the DMA channel mask bit are both
set
11
Reserved
The S-G Status register contains information on the S-G transfer status This register maintains
dynamic status information on S-G Transfer Activity the Current and Base Buffer state S-G Transfer
Termination and the End of the List indicator
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