82374EB Datasheet, PDF (51/208 Pages) Intel Corporation – SYSTEM COMPONENT (ESC)

82374EB 82374SB
writing a 1 to any of the status bits has no effect If software attempts to set a status bit to 0 at the same time
that the ESC is setting it to 1 the bit is set to 1 (i e the ESC hardware dominates)
The SMI handler can query the status bits to see what caused the SMI and then branch to the appropriate
routine As the individual routines complete the handler resets the appropriate status bit by writing a 0 to the
corresponding bit
Each of the SMIREQ bits is set by the ESC in response to the activation of the corresponding SMI event If the
SMI event is still active when the corresponding SMIREQ bit is set to 0 the ESC does not set the status bit
back to a 1 (i e there is only one status indication per active SMI event)
When an IRQx signal is asserted the corresponding RIRQx bit is set to a 1 If the IRQx signal is still active
when software sets the RIRQx bit to 0 RIRQx is not set back to a 1 The IRQx may be negated before
software sets the RIRQx bit to 0 If the RIRQx bit is set to 0 at the same time a new IRQx is activated RIRQx
remains at 1 This indicates to the SMI handler that a new SMI event has been detected
NOTE
1 The SMIREQ bits are set cleared or read independently of each other and independently of the
CSMIGATE bit in the SMICNTL Register
2 If an IRQx is set in level mode and shared by two devices the IRQ should not be enabled as an
SMI event The ESC’s SMIREQ bits are essentially set with an edge When the second IRQ occurs
on a shared IRQ there is no second edge and the SMI will not be generated for the second IRQ
Bit
Description
15 8 Reserved
7 APM SMI Status (RAPMC) The ESC sets this bit to 1 to indicate that a write to the APM Control
Register caused an SMI Software sets this bit to a 0 by writing a 0 to it
6 EXTSMI SMI Status (REXT) The ESC sets this bit to 1 to indicate that EXTSMI caused an SMI
Software sets this bit to a 0 by writing a 0 to it
5 Fast Off Timer Expired Status (RFOT) The ESC sets this bit to 1 to indicate that the Fast Off Timer
expired and caused an SMI Software sets this bit to a 0 by writing a 0 to it When the Fast Off Timer
expires the ESC sets this bit to a 1 Note that the timer re-starts counting one the next clock after it
expires
4 IRQ12 Request SMI Status (RIRQ12) The ESC sets this bit to 1 to indicate that IRQ12 caused an
SMI Software sets this bit to a 0 by writing a 0 to it
3 IRQ8 Request SMI Status The ESC sets this bit to 1 to indicate that IRQ8 caused an SMI
Software sets this bit to a 0 by writing a 0 to it
2 IRQ4 Request SMI Status The ESC sets this bit to 1 to indicate that IRQ4 caused an SMI Software
sets this bit to a 0 by writing a 0 to it
1 IRQ3 Request SMI Status The ESC sets this bit to 1 to indicate that IRQ3 caused an SMI Software
sets this bit to a 0 by writing a 0 to it
0 IRQ1 Request SMI Status The ESC sets this bit to 1 to indicate that IRQ1 caused an SMI Software
sets this bit to a 0 by writing a 0 to it
51