82374EB Datasheet, PDF (188/208 Pages) Intel Corporation – SYSTEM COMPONENT (ESC)

82374EB 82374SB
13 1 SMM Mode
SMM mode is invoked by asserting the SMI signal to the CPU The ESC provides a variety of programmable
events that can generate an SMI When the CPU receives an SMI it enters SMM mode and executes SMM
code out of SMRAM The SMM code places the system in either the Power On state or the Fast Off state In
the Power On state the computer system operates normally In this state one of the four programmable
events listed below can trigger an SMI
1 A global idle timer called the Fast Off timer expires (an indication that the end user has not used the
computer for a programmed period of time)
2 The EXTSMI pin is asserted
3 An RTC alarm interrupt is detected
4 The operating system issues an APM call
13 2 SMI Sources
The SMI signal can be asserted by hardware interrupt events the Fast Off Timer an external SMI event
(EXTSMI ) and software events (via the APMC and APMS Registers) Enable disable bits (in the SMIEN
Register) permit each event to be individually masked from generating an SMI In addition the SMI signal
can be globally enabled disabled in the SMICNTL Register Status of the individual events causing an SMI is
provided in the SMIREQ Register For detailed information on the SMI control status registers refer to Section
3 0 Register Description
Hardware Interrupt Events
Hardware events (IRQ 12 8 4 3 1 and the Fast Off Timer) are enabled disabled from generating an SMI in
the SMIEN Register When enabled the occurrence of the corresponding hardware event generates an SMI
(asserts the SMI signal) regardless of the current power state of the system
Fast Off Timer
The Fast Off Timer is used to indicate (through an SMI) that the system has been idle for a programmed period
of time The timer counts down from a programmed start value and when the count reaches 00h can generate
an SMI The timer decrement rate is 1 count every minute and is re-loaded each time a System Event occurs
This counter should NOT be programmed to 00h
System events are programmable events that can keep the system in the Power On state when there is
system activity (Figure 34) These events are indicated by the assertion of IRQ 15 9 8 7 3 1 0 NMI or SMI
signals The system event prevents the system from entering the Fast Off state by re-loading the Fast Off
Timer
In addition to system events break events cause the system to transition from a Fast Off state to the Power
On state System events (and break events) are enabled disabled in the SEE Register When enabled and the
associated hardware event occurs (signal is asserted) the Fast Off Timer is re-loaded with its initial count
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