82374EB Datasheet, PDF (39/208 Pages) Intel Corporation – SYSTEM COMPONENT (ESC)

82374EB 82374SB
3 1 5 BIOSCSB BIOS CHIP SELECT B REGISTER
Address Offset
Default Value
Attribute
Size
43h
00h
Read Write
8 Bits
The LBIOSCS signal is used to decode access to the motherboard BIOS The ESC decodes memory access
to the following address ranges and if the range has been enabled the LBIOSCS signal is always asserted
for memory reads in the enabled BIOS range If the BIOS Write Enable bit is set in the configuration register
BIOSCSB the LBIOSCS is also asserted for memory write cycles
Bit
Description
7 4 Reserved
3 BIOS Write Enable When enabled LBIOSCS is asserted for memory read AND write cycles for
addresses in the decoded and enabled BIOS range otherwise LBIOSCS is asserted for memory
read cycles ONLY
2 16 Meg BIOS During Memory access to locations FF0000h – FFFFFFh with this bit set LBIOSCS
will be asserted for memory read cycles If bit 3 of BIOSCSB is set then LBIOSCS will be asserted
for write cycles as well
1 High VGA BIOS During Memory access to locations 0C4000h – 0C7FFFh with this bit set LBIOSCS
will be asserted for memory read cycles If bit 3 of BIOSCSB is set then LBIOSCS will be asserted
for write cycles as well
0 Low VGA BIOS During Memory access to locations 0C0000h – 0C3FFFh with this bit set LBIOSCS
will be asserted for memory read cycles If bit 3 of BIOSCSB is set then LBIOSCS will be asserted
for write cycles as well
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