82374EB Datasheet, PDF (168/208 Pages) Intel Corporation – SYSTEM COMPONENT (ESC)

82374EB 82374SB
Figure 25 I O APIC Interrupt Mapping
290476 – D8
10 1 Physical Characteristics Of APIC Bus
The APIC bus is a 3-wire synchronous bus connecting all APICs (all I O units and all local units) Two of these
wires are used for data transmission and one wire is a clock For bus arbitration the APIC uses only one of the
data wires The bus is logically a wire-OR and electrically an open-drain connection providing for both mes-
sage transmission and arbitration for lowest priority All the values mentioned in the protocol description are
logical values (i e ‘‘Bus Driven’’ is logical 1 and ‘‘Bus Not Driven’’ is logical 0) The electrical values are 0 for
logical one and 1 for logical zero
10 2 Arbitration For APIC Bus
The APIC uses one wire arbitration to win the bus ownership A rotating priority scheme is used for arbitration
The winner of the arbitration becomes the lowest priority agent and assumes an arbitration ID of 0 All other
agents except the agent whose arbitration ID is 15 increment their arbitration IDs by one The agent whose ID
was 15 takes the winner’s arbitration ID and increments it by one Arbitration IDs are changed (incremented or
assumed) only for messages that are transmitted successfully For lowest priority messages the arbitration ID
is updated before the final status cycle which ultimately decides if the message is successful A message is
transmitted successfully if no CS error or acceptance error is reported for that message
An APIC agent can acquire the bus using two different priority schemes normal or EOI (End Of Interrupt) EOI
has the highest priority EOI priority is used to send EOI messages for level interrupts from local APIC to the
I O APIC When an agent requests the bus with EOI priority all others requesting the bus with normal priorities
back off
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