MC68HC908MR8 Datasheet, PDF (72/372 Pages) Motorola, Inc – Microcontrollers

Central Processor Unit (CPU)
6.3 Features
Features of the CPU include:
• Fully upward, object-code compatibility with M68HC05 family
• 16-bit stack pointer with stack manipulation instructions
• 16-bit index register with X-register manipulation instructions
• 8-MHz CPU internal bus frequency
• 64-Kbyte program/data memory space
• Sixteen addressing modes
• Memory-to-memory data moves without using the accumulator
• Fast 8-bit by 8-bit multiply and 16-bit by 8-bit divide instructions
• Enhanced binary-coded decimal (BCD) data handling
• Modular architecture with expandable internal bus definition for
extension of addressing range beyond 64 Kbytes
• Low-power stop and wait modes
6.4 CPU Registers
Figure 6-1 shows the five CPU registers. CPU registers are not part of
the memory map.
15
H
15
15
7
0
ACCUMULATOR (A)
0
X
INDEX REGISTER (H:X)
0
STACK POINTER (SP)
0
PROGRAM COUNTER (PC)
7
0
V 1 1 H I N Z C CONDITION CODE REGISTER (CCR)
CARRY/BORROW FLAG
ZERO FLAG
NEGATIVE FLAG
INTERRUPT MASK
HALF-CARRY FLAG
TWO’S COMPLEMENT OVERFLOW FLAG
Figure 6-1. CPU Registers
Technical Data
72
Central Processor Unit (CPU)
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor