MC68HC908MR8 Datasheet, PDF (152/372 Pages) Motorola, Inc – Microcontrollers

Pulse-Width Modulator for Motor Control
9.5.2 PWM Data Overflow and Underflow Conditions
The PWM value registers are 16-bit registers. Although the counter is
only 12 bits, the user may write a 16-bit signed value to a PWM value
register. As shown in Figure 9-3 and Figure 9-4, if the PWM value is
less than or equal to 0, the PWM will be inactive for the entire period.
Conversely, if the PWM value is greater than or equal to the timer
modulus, the PWM will be active for the entire period. Refer to Table 9-3.
NOTE:
The terms active and inactive refer to the asserted and negated states
of the PWM signals and should not be confused with the high-
impedance state of the PWM pins.
Table 9-3. PWM Data Overflow and Underflow Conditions
PWMVALxH:PWMVALxL
$0000–$0FFF
$1000–$7FFF
$8000–$FFFF
Condition
Normal
Overflow
Underflow
PWM Value Used
Per registers contents
$FFF
$000
9.6 Output Control
This subsection discusses output control.
9.6.1 Selecting Six Independent PWMs or Three Complementary PWM Pairs
The PWM outputs can be configured as six independent PWM channels
or three complementary channel pairs. The option INDEP determines
which mode is used (see 5.4 CONFIG Bits). If complementary operation
is chosen, the PWM pins are paired as shown in Figure 9-11. Operation
of one pair is then determined by one PWM value register. This type of
operation is meant for use in motor drive circuits such as the one in
Figure 9-12.
Technical Data
152
MC68HC908MR8 — Rev 4.1
Pulse-Width Modulator for Motor Control (PWMMC) Freescale Semiconductor