MC68HC908MR8 Datasheet, PDF (125/372 Pages) Motorola, Inc – Microcontrollers

Clock Generator Module (CGM)
CGM Registers
8.6 CGM Registers
These registers control and monitor operation of the CGM:
• PLL control register (PCTL), see 8.6.1 PLL Control Register
• PLL bandwidth control register (PBWC), see 8.6.2 PLL
Bandwidth Control Register
• PLL programming register (PPG), see 8.6.3 PLL Programming
Register
Figure 8-4 is a summary of the CGM registers.
Addr.
$005C
Register Name
Bit 7 6
5
4
3
2
1 Bit 0
Read
:
PLLF
1
1
1
1
PLL Control Register
(PCTL)
See page 126.
Write
:
PLLIE
PLLON BCS
R
R
R
R
R
Re-
set:
0
0
1
0
1
1
1
1
Read
:
LOCK
0
0
0
0
$005D
PLL Bandwidth Control Reg-
ister (PBWC)
See page 129.
Write
:
AUTO
R
ACQ XLD
R
R
R
R
Re-
set:
0
0
0
0
0
0
0
0
Figure 8-4. CGM I/O Register Summary
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
Clock Generator Module (CGM)
Technical Data
125