MC68HC908MR8 Datasheet, PDF (314/372 Pages) Motorola, Inc – Microcontrollers

Analog-to-Digital Converter (ADC)
18.4.2 Voltage Conversion
NOTE:
When the input voltage to the ADC equals V_REFH, the ADC converts the
signal to $3FF (full scale). If the input voltage equals V_SS, the ADC
converts it to $000. Input voltages between V_REFH and V_REFL are
straight-line linear conversions. All other input voltages will result in
$3FF if greater than V_REFH and $000 if less than V_SS.
Input voltage should not exceed the analog supply voltages.
18.4.3 Conversion Time
Conversion starts after a write to the ADC status and control register
(ADSCR). A conversion is between 16 and 17 ADC clock cycles,
therefore:
Conversion time = ^{16 to 17 ADC cycles}
ADC frequency
Number of bus cycles = conversion time x bus frequency
The ADC conversion time is determined by the clock source chosen and
the divide ratio selected. The clock source is either the bus clock or
CGMXCLK and is selectable by ADICLK located in the ADC clock
register. For example, if CGMXCLK is 4 MHz and is selected as the ADC
input clock source, the ADC input clock /4 prescale is selected:
Conversion time = ^{16 to 17 ADC cycles} = 16 to 17 µs
4 MHz/4
NOTE: The ADC frequency must be between f_ADIC minimum and f_ADIC
maximum to meet A/D specifications.
Since an ADC cycle may be comprised of several bus cycles (four in the
prior example) and the start of a conversion is initiated by a bus cycle
write to the ADSCR, from zero to four additional bus cycles may occur
before the start of the initial ADC cycle. This results in a fractional ADC
cycle and is represented as the 17th cycle.
Technical Data
314
Analog-to-Digital Converter (ADC)
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor