MC68HC908MR8 Datasheet, PDF (191/372 Pages) Motorola, Inc – Microcontrollers

Monitor ROM (MON)
Functional Description
10.4.3 Baud Rate
With a 4.0-MHz reference clock source, data is transferred between the
monitor and host at 9600 baud. The communication baud rate is
achieved by stepping up the internal CPU frequency to 8 MHz, using the
phase-locked loop (PLL). A 4.0-MHz reference frequency is necessary
in this mode as the PLL will not lock with any other reference clock.
As described in Table 10-1, on FLASH parts when V_SS is applied to IRQ
with $FFFE and $FFFF = 0, the PLL setup is bypassed and the baud rate
is equal to the reference frequency divided by 1024. This facilitates a
faster communication rate in the interest of a first time programmed
device. This allows selection of other reference frequencies and thus,
facilities a faster communication rate. The reference frequency, in this
case while not utilizing the PLL, is limited to the range of f_OP. Refer to
21.8 Control Timing.
10.4.4 Data Format
Communication with the monitor ROM is in standard non-return-to-zero
(NRZ) mark/space data format. See Figure 10-2 and Figure 10-3.
NEXT
START
START
BIT BIT 0 BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7 ^STOP BIT
BIT
Figure 10-2. Monitor Data Format
NEXT
START
START
$A5 BIT BIT 0 BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7 STOP BIT
BIT
BREAK
START
BIT BIT 0
BIT 1
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
STOP
BIT 7 BIT ^NEXT
START
BIT
Figure 10-3. Sample Monitor Waveforms
The data transmit and receive rate is 9600 baud. Transmit and receive
baud rates will be identical.
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
Monitor ROM (MON)
Technical Data
191