MC68HC908MR8 Datasheet, PDF (22/372 Pages) Motorola, Inc – Microcontrollers

List of Figures
7-12
7-13
7-14
7-15
7-16
7-17
8-1
8-2
8-3
8-4
8-5
8-6
8-7
9-1
9-2
9-3
9-4
9-5
9-6
9-7
9-8
9-9
9-10
9-11
9-12
9-13
9-14
9-15
9-16
9-17
9-18
9-19
9-20
9-21
9-22
Wait Mode Entry Timing . . . . . . . . . . . . . . . . . . . . . . . . . . .104
Wait Recovery from Interrupt or Break. . . . . . . . . . . . . . . . 105
Wait Recovery from Internal Reset . . . . . . . . . . . . . . . . . . 105
SIM Break Status Register (SBSR) . . . . . . . . . . . . . . . . . . 106
SIM Reset Status Register (SRSR) . . . . . . . . . . . . . . . . . . 108
SIM Break Flag Control Register (SBFCR) . . . . . . . . . . . . 109
CGM Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
CGM I/O Register Summary . . . . . . . . . . . . . . . . . . . . . . .115
CGM External Connections . . . . . . . . . . . . . . . . . . . . . . . . 123
CGM I/O Register Summary . . . . . . . . . . . . . . . . . . . . . . .125
PLL Control Register (PCTL) . . . . . . . . . . . . . . . . . . . . . . . 126
PLL Bandwidth Control Register (PBWC) . . . . . . . . . . . . . 129
PLL Programming Register (PPG) . . . . . . . . . . . . . . . . . . . 131
PWM Module Block Diagram . . . . . . . . . . . . . . . . . . . . . . . 141
Register Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142
Center-Aligned PWM (Positive Polarity). . . . . . . . . . . . . . . 147
Edge-Aligned PWM (Positive Polarity) . . . . . . . . . . . . . . . . 147
Reload Frequency Change . . . . . . . . . . . . . . . . . . . . . . . . 149
PWM Interrupt Requests . . . . . . . . . . . . . . . . . . . . . . . . . . 150
Center-Aligned PWM Value Loading . . . . . . . . . . . . . . . . . 150
Center-Aligned Loading of Modulus . . . . . . . . . . . . . . . . . . 151
Edge-Aligned PWM Value Loading . . . . . . . . . . . . . . . . . . 151
Edge-Aligned Modulus Loading . . . . . . . . . . . . . . . . . . . . . 151
Complementary Pairing . . . . . . . . . . . . . . . . . . . . . . . . . . . 153
Typical AC Motor Drive . . . . . . . . . . . . . . . . . . . . . . . . . . . 153
Dead-Time Generators. . . . . . . . . . . . . . . . . . . . . . . . . . . . 155
Effects of Dead-Time Insertion. . . . . . . . . . . . . . . . . . . . . . 156
Dead-Time at Duty Cycle Boundaries . . . . . . . . . . . . . . . . 156
Dead-Time and Small Pulse Widths. . . . . . . . . . . . . . . . . . 157
PWM Polarity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158
PWM Output Control Register (PWMOUT) . . . . . . . . . . . . 159
Dead-Time Insertion During OUTCTL = 1 . . . . . . . . . . . . . 160
Dead-Time Insertion During OUTCTL = 1 . . . . . . . . . . . . . 161
PWM Disabling Scheme. . . . . . . . . . . . . . . . . . . . . . . . . . .162
PWM Disable Mapping Write-Once Register (DISMAP) . . 163
Technical Data
22
List of Figures
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor