MC68HC908MR8 Datasheet, PDF (69/372 Pages) Motorola, Inc – Microcontrollers

Configuration Register (CONFIG)
CONFIG Bits
TOPNEG — Top-Side PWM Polarity Bit
TOPNEG determines if the top-side PWMs will have positive or
negative polarity. See Section 9. Pulse-Width Modulator for Motor
Control (PWMMC).
1 = Negative polarity
0 = Positive polarity
INDEP — Independent Mode Enable Bit
INDEP determines if the motor control PWMs will be six independent
PWMs or three complementary PWM pairs. See Section 9.
Pulse-Width Modulator for Motor Control (PWMMC).
1 = Six independent PWMs
0 = Three complementary PWM pairs
LVIPWR — LVI Power Enable Bit
LVIPWR enables the LVI module. See Section 17. Low-Voltage
Inhibit (LVI).
1 = LVI module power enabled
0 = LVI module power disabled
LVIRST — LVI Reset Enable Bit
LVIRST enables the reset signal from the LVI module. See
Section 17. Low-Voltage Inhibit (LVI).
1 = LVI module resets enabled
0 = LVI module resets disabled
STOPE — STOP Enable Bit
STOPE enables the STOP instruction. See Section 6. Central
Processor Unit (CPU).
1 = STOP instruction is enabled.
0 = STOP instruction is disabled and executes as an illegal
instruction.
COPD — COP Disable Bit
COPD disables the COP module. See Section 15. Computer
Operating Properly (COP).
1 = COP module disabled
0 = COP module enabled
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
Configuration Register (CONFIG)
Technical Data
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