MC68HC908MR8 Datasheet, PDF (365/372 Pages) Motorola, Inc – Microcontrollers

multiplexer — A device that can select one of a number of inputs and pass the logic level of that
input on to the output.
N — The negative bit in the condition code register of the CPU08. The CPU sets the negative bit
when an arithmetic operation, logical operation, or data manipulation produces a negative
result.
nibble — A set of four bits (half of a byte).
object code — The output from an assembler or compiler that is itself executable machine code
or is suitable for processing to produce executable machine code.
opcode — A binary code that instructs the CPU to perform an operation.
open-drain — An output that has no pullup transistor. An external pullup device can be
connected to the power supply to provide the logic 1 output voltage.
operand — Data on which an operation is performed. Usually, a statement consists of an
operator and an operand. For example, the operator may be an add instruction, and the
operand may be the quantity to be added.
oscillator — A circuit that produces a constant frequency square wave that is used by the
computer as a timing and sequencing reference.
overflow — A quantity that is too large to be contained in one byte or one word.
page zero — The first 256 bytes of memory (addresses $0000–$00FF).
parity — An error-checking scheme that counts the number of logic 1s in each byte transmitted.
In a system that uses odd parity, every byte is expected to have an odd number of logic 1s.
In an even parity system, every byte should have an even number of logic 1s. In the
transmitter, a parity generator appends an extra bit to each byte to make the number of logic
1s odd for odd parity or even for even parity. A parity checker in the receiver counts the
number of logic 1s in each byte. The parity checker generates an error signal if it finds a byte
with an incorrect number of logic 1s.
PC — See program counter (PC).
peripheral — A circuit not under direct CPU control.
phase-locked loop (PLL) — An oscillator circuit in which the frequency of the oscillator is
synchronized to a reference signal.
PLL — See phase-locked loop (PLL).
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
Technical Data
365