MC68HC908MR8 Datasheet, PDF (337/372 Pages) Motorola, Inc – Microcontrollers

Break (BRK)
Break Module Registers
HIBYTE EQU 5
LOBYTE EQU 6
; If not BW, do RTI
BRCLR BW,BSR, RETURN ; See if wait mode or stop
; mode was exited by break.
TST LOBYTE,SP
; If RETURNLO is not 0,
BNE DOLO
; then just decrement low byte.
DEC HIBYTE,SP
; Else deal with high byte also.
DOLO DEC LOBYTE,SP
; Point to WAIT/STOP opcode.
RETURN PULH
; Restore H register.
RTI
Figure 20-7. Example Code
20.6.4 SIM Break Flag Control Register
The SIM break flag control register (SBFCR) contains a bit that enables
software to clear status bits while the MCU is in a break state.
Ad-
dress:
$FE03
Bit 7
6
5
4
3
2
1
Bit 0
Read:
BCFE
R
R
R
R
R
R
R
Write:
Reset: 0
R = Reserved
Figure 20-8. SIM Break Flag Control Register (SBFCR)
BCFE — Break Clear Flag Enable Bit
This read/write bit enables software to clear status bits by accessing
status registers while the MCU is in a break state. To clear status bits
during the break state, the BCFE bit must be set.
1 = Status bits clearable during break
0 = Status bits not clearable during break
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
Break (BRK)
Technical Data
337