MC68HC908MR8 Datasheet, PDF (63/372 Pages) Motorola, Inc – Microcontrollers

FLASH Memory
FLASH Programming Algorithm
4.3.2 FLASH Block Protect Register
The block protect register (FLBPR) is implemented as a byte within the
FLASH memory, and therefore can only be written during a
programming sequence of the FLASH memory. The value in this register
determines the starting location of the protected range within the FLASH
memory.
Ad- $FF7E
dress:
Bit 7
6
5
4
3
2
1
Bit 0
Read:
BPR7
Write:
BPR6
BPR5
BPR4
BPR3
BPR2
BPR1
BPR0
Reset: U
U
U
U
U
U
U
U
U= Unaffected by reset. Initial value from factory is 1.
Write to this register by a programming sequence to the FLASH memory.
Figure 4-3. FLASH Block Protect Register (FLBPR)
BPR[7:0] — Block Protect Register Bits
These eight bits represent bits [13:6] of a 16-bit memory address.
Bits[15:14] are logical 1s and bits [5:0] are logic 0s.
The resultant 16-bit address is used for specifying the start address
of the FLASH memory for block protection. The FLASH is protected
from this start address to the end of FLASH memory at $FFFF. With
this mechanism, the protect start address can be $XX00, $XX40,
$XX80, and $XXC0 (64-byte page boundaries) within the FLASH
memory.
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
FLASH Memory
Technical Data
63