MC68HC908MR8 Datasheet, PDF (220/372 Pages) Motorola, Inc – Microcontrollers

Timer Interface A (TIMA)
NOTE:
Before changing a channel function by writing to the MSxB or MSxA bit,
set the TSTOP and TRST bits in the TIMA status and control register
(TASC).
ELSxB and ELSxA — Edge/Level Select Bits
When channel x is an input capture channel, these read/write bits
control the active edge-sensing logic on channel x.
When channel x is an output compare channel, ELSxB and ELSxA
control the channel x output behavior when an output compare
occurs.
When ELSxB and ELSxA are both clear, channel x is not connected
to port B, and pin PTBx/TCHxA is available as a general-purpose I/O
pin. However, channel x is at a state determined by these bits and
becomes transparent to the respective pin when PWM, input capture,
or output compare mode is enabled. Table 11-2 shows how ELSxA
and ELSxA work. Reset clears the ELSxB and ELSxA bits.
Table 11-2. Mode, Edge, and Level Selection
MSxB:MSxA ELSxB:ELSxA Mode
Configuration
X0
00
Pin under port control:
Initialize timer
Output ^{Output level high}
X1
00
preset _{Pin under port control:}
Initialize timer
Output level low
00
01
Capture on rising edge only
00
10
Input
capture
Capture on falling edge only
00
11
Capture on rising or falling edge
01
01
Toggle output on compare
Output
01
10
compare Clear output on compare
or PWM
01
11
Set output on compare
1X
01
Buffered Toggle output on compare
output
1X
10
compare ^{Clear output on compare}
or
1X
11
buffered _{Set output on compare}
PWM
Technical Data
220
Timer Interface A (TIMA)
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor