MC68HC908MR8 Datasheet, PDF (43/372 Pages) Motorola, Inc – Microcontrollers

Memory Map
I/O Section
Addr.
Register Name
Bit 7
6
TIMA Channel 0 Regis- ^Read: _{Bit 15}
14
$0014
ter High (TACH0H) Write:
See page 222. _Reset:
TIMA Channel 0 Regis- ^Read: _{Bit 7}
6
$0015
ter Low (TACH0L) Write:
See page 218. _Reset:
$0016
TIMA Channel 1 Sta- Read: CH1F
tus/Control
Register (TASC1)
Write:
0
See page 222. Reset: 0
CH1IE
0
TIMA Channel 1 Regis- ^Read: _{Bit 15}
14
$0017
ter High (TACH1H) Write:
See page 222. _Reset:
TIMA Channel 1 Regis- ^Read: _{Bit 7}
6
$0018
ter Low (TACH1L) Write:
See page 222. _Reset:
$0019
↓
$001E
5
4
3
2
1
Bit 0
13
12
11
10
9
Bit 8
Indeterminate after reset
5
4
3
2
1
Bit 0
Indeterminate after reset
0
R
MS1A
ELS1B
ELS1A
TOV1
CH1MA
X
0
0
0
0
0
0
13
12
11
10
9
Bit 8
Indeterminate after reset
5
4
3
2
1
Bit 0
Indeterminate after reset
Unimplemented
Unimplemented
$001F
Configuration Register ^Read: _EDGE
(CONFIG) Write:
See page 68. _{Reset: 0}
BOT-
NEG
0
TOP-
NEG
0
$0020
PWM Control Register 1 ^Read:
(PCTL1) Write:
See page 175. _Reset:
DISX
0
DISY
0
PW-
MINT
0
PWM Control Register 2
Read:
LDFQ1
LDFQ0
0
$0021
(PCTL2) Write:
See page 177. _{Reset: 0}
0
0
U = Unaffected X = Indetermi-
nate
R ^{= Reserved}
INDEP LVIRST LVIPWR STOPE COPD
0
1
PWMF
0
0
1
0
0
LDOK
PW-
MEN
0
0
0
SEL12 SEL34 SEL56 PRSC1 PRSC0
0
Bold
0
= Buff-
ered
0
0
0
= Unimplemented
Figure 2-2. Control, Status, and Data Registers (Sheet 3 of 10)
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
Memory Map
Technical Data
43