MC68HC908MR8 Datasheet, PDF (282/372 Pages) Motorola, Inc – Microcontrollers

Input/Output (I/O) Ports
14.3.2 Data Direction Register A
Data direction register A (DDRA) determines whether each port A pin is
an input or an output. Writing a logic 1 to a DDRA bit enables the output
buffer for the corresponding port A pin; a logic 0 disables the output
buffer.
Ad-
dress:
$0004
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Write:
DDRA6 DDRA5 DDRA4 DDRA3 DDRA2 DDRA1 DDRA0
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 14-3. Data Direction Register A (DDRA)
DDRA[6:0] — Data Direction Register A Bits
These read/write bits control port A data direction. Reset clears
DDRA[6:0], configuring all port A pins as inputs.
1 = Corresponding port A pin configured as output
0 = Corresponding port A pin configured as input
NOTE: Avoid glitches on port A pins by writing to the port A data register before
changing data direction register A bits from 0 to 1.
Figure 14-4 shows the port A I/O logic.
Technical Data
282
Input/Output (I/O) Ports
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor