MC68HC908MR8 Datasheet, PDF (283/372 Pages) Motorola, Inc – Microcontrollers

Input/Output (I/O) Ports
Port A
READ DDRA ($0004)
WRITE DDRA ($0004)
RESET
DDRAx
WRITE PTA ($0000)
PTAx
PTAx
READ PTA ($0000)
Figure 14-4. Port A I/O Circuit
When bit DDRAx is a logic 1, reading address $0000 reads the PTAx
data latch. When bit DDRAx is a logic 0, reading address $0000 reads
the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit. Table 14-1 summarizes
the operation of the port A pins.
Table 14-1. Port A Pin Functions
DDRA
Bit
PTA
Bit
I/O Pin
Mode
Accesses
to DDRA
Read/Write
0
X⁽¹⁾
Input, Hi-Z^{(2) DDRA[6:0]}
1
X
Output
DDRA[6:0]
1. X = don’t care
2. Hi-Z = high impedance
3. Writing affects data register, but does not affect input.
Accesses to PTA
Read
Pin
PTA[6:0]
Write
PTA[6:0]⁽³⁾
PTA[6:0]
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
Input/Output (I/O) Ports
Technical Data
283