MC68HC908MR8 Datasheet, PDF (57/372 Pages) Motorola, Inc – Microcontrollers

FLASH Memory
Introduction
4.2.2 FLASH Control Register
The FLASH control register (FLCR) controls the FLASH program, erase,
and read operations.
Ad- $FE08
dress:
Bit 7
6
5
4
3
2
1
Read: 0
0
0
0
HVEN MASS ERASE
Write:
Reset: 0
0
0
0
0
0
0
= Unimplemented
Figure 4-1. FLASH Control Register (FLCR)
Bit 0
PGM
0
HVEN — High-Voltage Enable Bit
This read/write bit enables the charge pump to drive high voltages for
program and erase operations in the array. HVEN can be set only if
either PGM = 1 or ERASE = 1 and the proper sequence for
program/margin read or erase is followed.
1 = High voltage enabled to array and charge pump on
0 = High voltage disabled to array and charge pump off
MASS — Mass Erase Control Bit
This read/write bit configures the memory for mass erase operation.
1 = Mass erase operation selected
0 = Mass erase operation unselected
ERASE — Erase Control Bit
This read/write bit configures the memory for erase operation.
ERASE is interlocked with the PGM bit such that both bits cannot be
set at the same time.
1 = Erase operation selected
0 = Erase operation unselected
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
FLASH Memory
Technical Data
57