MC68HC908MR8 Datasheet, PDF (359/372 Pages) Motorola, Inc – Microcontrollers

Technical Data — MC68HC908MR8
Glossary
A — See accumulator (A).
accumulator (A) — An 8-bit general-purpose register in the CPU08. The CPU08 uses the
accumulator to hold operands and results of arithmetic and logic operations.
acquisition mode — A mode of PLL operation during startup before the PLL locks on a
frequency. Also see tracking mode.
address bus — The set of wires that the CPU or DMA uses to read and write memory locations.
addressing mode — The way that the CPU determines the operand address for an instruction.
The M68HC08 CPU has 16 addressing modes.
ALU — See arithmetic logic unit (ALU).
arithmetic logic unit (ALU) — The portion of the CPU that contains the logic circuitry to perform
arithmetic, logic, and manipulation operations on operands.
asynchronous — Refers to logic circuits and operations that are not synchronized by a common
reference signal
baud rate — The total number of bits transmitted per unit of time.
BCD — See binary-coded decimal (BCD)
binary — Relating to the base 2 number system
binary number system — The base 2 number system, having two digits, 0 and 1. Binary
arithmetic is convenient in digital circuit design because digital circuits have two permissible
voltage levels, low and high. The binary digits 0 and 1 can be interpreted to correspond to the
two digital voltage levels.
binary-coded decimal (BCD) — A notation that uses 4-bit binary numbers to represent the 10
decimal digits and that retains the same positional structure of a decimal number. For
example,
234 (decimal) = 0010 0011 0100 (BCD)
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
Technical Data
359