MC68HC908MR8 Datasheet, PDF (41/372 Pages) Motorola, Inc – Microcontrollers

Memory Map
I/O Section
$FF7E
$FF7F
↓
$FFD1
$FFD2
↓
$FFFE
$FFFF
FLASH BLOCK PROTECT REGISTER (FLBPR)
UNIMPLEMENTED — 83 BYTES
VECTORS — 45 BYTES (46 including $FFFF)
Low byte of reset vector when read
COP Control Register (COPCTL)
Figure 2-1. Memory Map
$FF7E
$FF7F
↓
$FFD1
$FFD2
↓
$FFFE
$FFFF
Addr.
$0000
$0001
$0002
$0003
Register Name
Bit 7
Port A Data Register ^Read _U
(PTA) Write:
See page 281. _Reset
Read:
Port B Data Register
U
(PTB) Write:
See page 284. _Reset:
6
PTA6
PTB6
5
PTA5
PTB5
4
3
2
PTA4 PTA3 PTA2
Unaffected by reset
PTB4 PTB3 PTB2
Unaffected by reset
Read:
Port C Data Register
U
U
(PTC) Write:
See page 287. _Reset:
U
U
U
U
Unaffected by reset
Unimplemented
1
Bit 0
PTA1 PTA0
PTB1 PTB0
PTC1 PTC0
Read:
Data Direction Register
U
$0004
A
(DDRA)
Write:
See page 282. Reset: _U
DDRA6 DDRA5 DDRA4 DDRA3 DDRA2 DDRA1 DDRA0
0
0
0
0
0
0
0
U = Unaffected X = Indetermi-
nate
R ^{= Reserved}
Bold
= Buff-
ered
= Unimplemented
Figure 2-2. Control, Status, and Data Registers (Sheet 1 of 10)
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
Memory Map
Technical Data
41