MC68HC908MR8 Datasheet, PDF (49/372 Pages) Motorola, Inc – Microcontrollers

Memory Map
I/O Section
Addr.
$005F
Register Name
Reserved
Bit 7
6
5
4
3
2
1
Bit 0
R
R
R
R
R
R
R
R
SIM Break Status Regis- Read:
$FE00
ter
(SBSR)
Write:
R
R
See page 336. Reset:
Note 1. Writing a logic 0 clears SBSW.
SIM Reset Status Regis- Read: POR PIN
$FE01
ter
(SRSR)
Write:
R
R
See page 108. Reset: 1
0
SIM Break Flag Control ^Read: _BCFE
R
$FE03
Register (SBFCR) Write:
See page 109. _{Reset: 0}
FLASH Control Register ^{Read: 0}
0
$FE08
(FLCR) Write:
See page 57.
Reset: 0
0
$FE0A
Reserved
R
R
R
COP
R
0
R
0
0
R
R
ILOP
R
0
R
0
0
R
R
ILAD
R
0
R
SBSW
R
Note⁽¹⁾
R
0
0
LVI
0
R
R
R
0
0
0
R
R
R
HVEN MASS ERASE PGM
0
0
0
0
R
R
R
R
$FE0B
Unimplemented
Break Address Register ^Read: _{Bit 15}
$FE0C
High (BRKH) Write:
See page 334. _{Reset: 0}
Bit 14
0
Bit 13
0
Break Address Register ^Read:
$FE0D
Low (BRKL) Write:
See page 334. _Reset:
Bit 7
0
Bit 6
0
Bit 5
0
Break Status and Con- ^Read: _{BRKE BRKA}
0
$FE0E trol Register (BRKSCR) Write:
See page 333. _{Reset: 0}
0
0
U = Unaffected X = Indetermi-
nate
R ^{= Reserved}
Bit 12
0
Bit 4
0
0
Bit 11
0
Bit 3
0
0
0
Bold
0
= Buff-
ered
Bit 10 Bit 9 Bit 8
0
0
0
Bit 2 Bit 1 Bit 0
0
0
0
0
0
0
0
0
0
= Unimplemented
Figure 2-2. Control, Status, and Data Registers (Sheet 9 of 10)
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
Memory Map
Technical Data
49