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MC68HC908MR8 Datasheet, PDF (188/372 Pages) Motorola, Inc – Microcontrollers
Monitor ROM (MON)
10.4 Functional Description
The monitor ROM receives and executes commands from a host
computer. Figure 10-1 shows a sample circuit used to enter monitor
mode and communicate with a host computer via a standard RS-232
interface.
Simple monitor commands can access any memory address. In monitor
mode, the MCU can execute host-computer code in RAM while all MCU
pins retain normal operating mode functions. All communication
between the host computer and the MCU is through the serial
communications interface (SCI). A level-shifting RS-232 interface is
required between the SCI and the host computer. PTB1 requires a
pulldown resistor to ensure proper entry into monitor mode.
10.4.1 Entering Monitor Mode
Table 10-1 shows the pin conditions for entering monitor mode.
Table 10-1. Mode Selection
IRQ
Pin
RESET
$FFFE/
$FFFF
PLL
PTB0
PTB1
External
Clock
CGMOUT
fop
COP
Baud
Rate
Comment
X VSS
X
XX X
X
0
No operation
0
Disabled 0 until reset = VDD
VDD
VHI or
VHI
PLL configured with
X
ON VDD VSS 4.0 MHz 16.0 MHz 8.0 MHz Disabled 9600 BCS set by monitor
code
VDD VDD
Blank
(FF)
ON
X
PLL configured with
X 4.0 MHz 16.0 MHz 8.0 MHz Disabled 9600 BCS set by monitor
code
Enters monitor
VSS VDD
Blank
(FF)
OFF
X
X
fOSC
fOSC/2
fOSC/4
Disabled
fOSC
mode with any
external clock rate
/1024 within operating
spec
VDD VDD Non-blank X X
X
X
X
X Enabled X Enters user mode
X = Don’t care
PTB0 = VDD and PTB1 = VSS to enter monitor mode
PTB0 (RXD) and PTB1 (TXD) used for serial communications (all monitor mode)
Technical Data
188
Monitor ROM (MON)
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor