MC68HC908MR8 Datasheet, PDF (267/372 Pages) Motorola, Inc – Microcontrollers

Serial Communications Interface (SCI)
I/O Registers
13.9.2 SCI Control Register 2
SCI control register 2 (SCC2):
• Enables these CPU interrupt requests:
– Enables the SCTE bit to generate transmitter CPU interrupt
requests
– Enables the TC bit to generate transmitter CPU interrupt
requests
– Enables the SCRF bit to generate receiver CPU interrupt
requests
– Enables the IDLE bit to generate receiver CPU interrupt
requests
• Enables the transmitter
• Enables the receiver
• Enables SCI wake up
• Transmits SCI break characters
Ad-
dress:
$0039
Bit 7
6
5
4
3
2
1
Bit 0
Read:
SCTIE TCIE SCRIE ILIE
TE
RE RWU SBK
Write:
Reset: 0
0
0
0
0
0
0
0
Figure 13-8. SCI Control Register 2 (SCC2)
SCTIE — SCI Transmit Interrupt Enable Bit
This read/write bit enables the SCTE bit to generate SCI transmitter
CPU interrupt requests. Setting the SCTIE bit in SCC3 enables SCTE
CPU interrupt requests. Reset clears the SCTIE bit.
1 = SCTE enabled to generate CPU interrupt
0 = SCTE not enabled to generate CPU interrupt
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
Serial Communications Interface (SCI)
Technical Data
267