MC68HC908MR8 Datasheet, PDF (239/372 Pages) Motorola, Inc – Microcontrollers

Timer Interface B (TIMB)
I/O Registers
TRST — TIMB Reset Bit
Setting this write-only bit resets the TIMB counter and the TIMB
prescaler. Setting TRST has no effect on any other registers.
Counting resumes from $0000. TRST is cleared automatically after
the TIMB counter is reset and always reads as logic 0. Reset clears
the TRST bit.
1 = Prescaler and TIMB counter cleared
0 = No effect
NOTE: Setting the TSTOP and TRST bits simultaneously stops the TIMB
counter at a value of $0000.
PS[2:0] — Prescaler Select Bits
These read/write bits select one of the seven prescaler outputs as the
input to the TIMB counter as Table 12-1 shows. Reset clears the
PS[2:0] bits.
Table 12-1. Prescaler Selection
PS[2:0]
000
001
010
011
100
101
110
111
TIMB Clock Source
Internal Bus Clock ÷ 1
Internal Bus Clock ÷ 2
Internal Bus Clock ÷ 4
Internal Bus Clock ÷ 8
Internal Bus Clock ÷ 16
Internal Bus Clock ÷ 32
Internal Bus Clock ÷ 64
Invalid: do not use this value
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
Timer Interface B (TIMB)
Technical Data
239