MC68HC908MR8 Datasheet, PDF (185/372 Pages) Motorola, Inc – Microcontrollers

Pulse-Width Modulator for Motor Control (PWMMC)
PWM Glossary
OUT6:OUT1— PWM Pin Output Control Bits
These read/write bits control the PWM pins according to Table 9-7.
Table 9-7. OUTx Bits
OUTx Bit
Complementary Mode
Independent Mode
OUT1
1 — PWM1 is active
0 — PWM1 is inactive
1 — PWM1 is active
0 — PWM1 is inactive
OUT2
1 — PWM2 is complement of PWM 1 1 — PWM2 is active
0 — PWM2 is inactive
0 — PWM2 is inactive
OUT3
1 — PWM3 is active
0 — PWM3 is inactive
1 — PWM3 is active
0 — PWM3 is inactive
OUT4
1 — PWM4 is complement of PWM 3 1 — PWM4 is active
0 — PWM4 is inactive
0 — PWM4 is inactive
OUT5
1 — PWM5 is active
0 — PWM5 is inactive
1 — PWM5 is active
0 — PWM5 is inactive
OUT6
1 — PWM 6 is complement of PWM 5 1 — PWM6 is active
0 — PWM6 is inactive
0 — PWM6 is inactive
9.13 PWM Glossary
CPU Cycle — One internal bus cycle (1/f_OP)
PWM Clock Cycle (or Period) — One tick of the PWM counter (1/f_OP
with no prescaler). See Figure 9-43.
PWM Cycle (or Period)
• Center-aligned mode: The time it takes the PWM counter to count
up and count down (modulus * 2/f_OP assuming no prescaler). See
Figure 9-43.
• Edge-aligned mode: The time it takes the PWM counter to count
up (modulus/f_OP). See Figure 9-43.
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor Pulse-Width Modulator for Motor Control (PWMMC)
Technical Data
185