MC68HC908MR8 Datasheet, PDF (190/372 Pages) Motorola, Inc – Microcontrollers

Monitor ROM (MON)
Enter monitor mode by applying a logic 0 and then a logic 1 to the RST
pin (see Table 10-1)
Once out of reset, the MCU waits for the host to send eight security
bytes. After receiving the security bytes, the MCU sends a break signal
(10 consecutive logic 0s) to the host computer, indicating that it is ready
to receive a command.
Monitor mode uses alternate vectors for reset and SWI. The alternate
vectors are in the $FE page instead of the $FF page and allow code
execution from the internal monitor firmware instead of user code. The
computer operating properly (COP) module is disabled in monitor mode
as long as V_HI is applied to either the IRQ pin or the RST pin. Refer to
Section 7. System Integration Module (SIM) for more information on
modes of operation.
10.4.2 Forced Monitor Mode
On FLASH parts, if the voltage applied to the IRQ1 is less than V_HI, the
MCU will come out of reset in user mode. The memory reset module
monitors the reset vector fetches and will assert an internal reset if it
detects that the reset vectors are erased. When the MCU comes out of
reset with its reset vector erased, it is forced into monitor mode without
requiring high voltage on the IRQ1 pin.
The computer operating properly (COP) module is disabled in forced
monitor mode. Any reset other than a power-on reset (POR) will
automatically force the MCU to come back to the forced monitor mode.
Table 10-2 is a summary of the differences between user mode and
monitor mode.
Table 10-2. Mode Differences
Functions
Modes
COP
Reset
Reset
SWI
SWI
Vector High Vector Low Vector High Vector Low
User Enabled
$FFFE
$FFFF
$FFFC
$FFFD
Monitor _Disabled⁽¹⁾
$FEFE
$FEFF
$FEFC
$FEFD
1. If the high voltage (V_HI) is removed from the IRQ pin or the RST pin, the SIM
asserts its COP enable output.
Technical Data
190
Monitor ROM (MON)
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor