XC3S100E Datasheet, PDF (72/193 Pages) Xilinx, Inc – DC and Switching Characteristics

R
Functional Description
Table 45: Variant Select Codes for SPI Serial Flash PROMs
VS2 VS1 VS0
SPI Read
Command
Dummy
Bytes
SPI Serial Flash Vendor
SPI Flash Family
STMicroelectronics (ST)
M25Pxx
NexFlash
FAST READ (0x0B)
111
1
(see Figure 50)
Silicon Storage Technology (SST)
NX25Pxx
SST25LFxxxA
SST25VFxxxA
Programmable Microelectronics Corp. (PMC) Pm25LVxxx
STMicroelectronics (ST)
M25Pxx
NexFlash
NX25Pxx
READ (0x03)
101
(see Figure 50)
0
Silicon Storage Technology (SST)
SST25LFxxxA
SST25VFxxxA
SST25VFxxx
Programmable Microelectronics Corp. (PMC) Pm25LVxxx
READ ARRAY
1 1 0 (0xE8)
(see Figure 51)
3
Atmel Corporation
AT45DB DataFlash
Others
Reserved
W _{Table 46 shows the connections between the SPI Flash}
PROM and the FPGA’s SPI configuration interface. Each
SPI Flash PROM vendor uses slightly different signal nam-
ing. The SPI Flash PROM’s write protect and hold controls
are not used by the FPGA during configuration. However,
the HOLD pin must be High during the configuration pro-
cess. The PROM’s write protect input must be High in order
to write or program the Flash memory.
Table 46: SPI Flash PROM Connections and Pin Naming
SPI Flash Pin
FPGA Connection
DATA_IN
MOSI
DATA_OUT
DIN
SELECT
CSO_B
CLOCK
CCLK
WR_PROTECT
W
Not required for FPGA configuration. Must be
High to program SPI Flash. Optional
connection to FPGA user I/O after
configuration.
HOLD
(see Figure 50)
Not required for FPGA configuration but must
be High during configuration. Optional
connection to FPGA user I/O after
configuration. Not applicable to Atmel
DataFlash.
STMicro
D
Q
S
C
W
HOLD
Silicon
Storage
NexFlash Technology
DI
SI
DO
SO
CS
CE#
CLK
SCK
WP
WP#
HOLD
HOLD#
Atmel
DataFlash
SI
SO
CS
SCK
WP
N/A
DS312-2 (v1.1) March 21, 2005
www.xilinx.com
65
Advance Product Specification