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XC3S100E Datasheet, PDF (108/193 Pages) Xilinx, Inc – DC and Switching Characteristics
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DC and Switching Characteristics
Table 7: Recommended Operating Conditions for User I/Os Using Single-Ended Standards
IOSTANDARD
Attribute
VCCO for Drivers(2)
Min (V) Nom (V) Max (V)
Min (V)
VREF
Nom (V)
Max (V)
VIL
Max (V)
VIH
Min (V)
HSTL_I_18
HSTL_III_18
LVCMOS12(4)
1.7
1.8
1.9
0.8
0.9
1.1
VREF - 0.1
VREF + 0.1
1.7
1.8
1.9
-
1.1
-
VREF - 0.1
VREF + 0.1
1.1
1.2
1.3
-
-
-
0.38
0.8
LVCMOS15(4)
1.4
1.5
1.6
-
-
-
0.38
0.8
LVCMOS18(4)
1.65
1.8
1.95
-
-
-
0.38
0.8
LVCMOS25(4,5)
2.3
2.5
2.7
-
-
-
0.7
1.7
LVCMOS33(4)
3.0
3.3
3.45
-
-
-
0.8
2.0
LVTTL
3.0
3.3
3.45
-
-
-
0.8
2.0
PCI33_3(7)
-
3.0
-
-
-
-
0.9
1.5
PCI66_3(7)
-
3.0
-
-
-
-
0.9
1.5
PCIX(7)
-
TBD
-
-
-
-
TBD
TBD
SSTL18_I
SSTL2_I
1.70
2.3
1.80
2.5
1.90
2.7
0.833
1.15
0.900
1.25
0.969
1.35
VREF - 0.125
VREF - 0.15
VREF + 0.125
VREF + 0.15
Notes:
1. Descriptions of the symbols used in this table are as follows:
VCCO -- the supply voltage for output drivers
VREF -- the reference voltage for setting the input switching threshold
VIL -- the input voltage that indicates a Low logic level
VIH -- the input voltage that indicates a High logic level
2. The VCCO rails supply only output drivers, not input circuits.
3. For device operation, the maximum signal voltage (VIH max) may be as high as VIN max. See Table 1.
4. There is approximately 100 mV of hysteresis on inputs using any LVCMOS standard.
5. All Dedicated pins (PROG_B, DONE, TCK, TDI, TDO, and TMS) use the LVCMOS25 standard and draw power from the VCCAUX rail (2.5V).
The Dual-Purpose configuration pins use the LVCMOS25 standard before the User mode. When using these pins as part of a standard 2.5V
configuration interface, apply 2.5V to the VCCO lines of Banks 0, 1, and 2 at power-on as well as throughout configuration.
6. The Global Clock Inputs (GCLK0-GCLK15, RHCLK0-RHCLK7, and LHCLK0-LHCLK7) are Dual-Purpose pins to which any signal standard
may be assigned.
7. For more information, see "Virtex-II Pro and Spartan-3 3.3V PCI Reference Design" (XAPP653).
DS312-3 (v1.0) March 1, 2005
www.xilinx.com
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